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Microchip Technology /ATSAMV71J20 /UART0 /IDR

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Interpret as IDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXRDY)RXRDY 0 (TXRDY)TXRDY 0 (OVRE)OVRE 0 (FRAME)FRAME 0 (PARE)PARE 0 (TXEMPTY)TXEMPTY 0 (CMP)CMP

Description

Interrupt Disable Register

Fields

RXRDY

Disable RXRDY Interrupt
TXRDY

Disable TXRDY Interrupt
OVRE

Disable Overrun Error Interrupt
FRAME

Disable Framing Error Interrupt
PARE

Disable Parity Error Interrupt
TXEMPTY

Disable TXEMPTY Interrupt
CMP

Disable Comparison Interrupt

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data